Inline assembler

[sean_vn]

I always use the unaligned SSE move instructions for reg-memory and memory-reg transfers. I didn't notice any difference in speed compared to the aligned ones.

[Stonemonkey]

I always use the unaligned SSE move instructions for reg-memory and memory-reg transfers. I didn't notice any difference in speed compared to the aligned ones.

if the data is aligned then there's not much difference between using movaps and movups but if the data isnt aligned it is slower and movups must be used, and ops like addps xmm0,[addr] only work on aligned data otherwise it has to be loaded into a register first.

[TheRaven]

Okay, thank you MrSwiss and Jawade.

There is a problem with the following code, it should loop 10 times (print 1) but instead loops indefinitely. Code snippet from: https://www.tutorialspoint.com/assembly ... _loops.htm

Code: Select all

dim as integer i,j,k,a,b,c
screenres 800,600,32
asm
mov ecx,10
l1:
end asm
print 1
asm
loop l1
end asm
sleep
beep

- mov is short for move? As it moves a value to a register? (ecx)
(if you were actually asking: yes it is short for MOVe)

- A register (ecx) is some sort of hardware variable?
(Not always, but during complex instructions like stosb ECX becomes a counter for the CPU otherwise it is considered a general purpose register.)

- l1: is a label?

Very late response, but hopefully it helps someone else in a similar situation.
My suggestion (and was surprisingly easy to accomplish with FB --NICE )

Tested with both 32 & 64-bit executable output:

Code: Select all

DIM ctr AS Long = 10
DO
  ASM
    DEC DWord Ptr[ctr]
    ''DEC QWord Ptr[ctr]
  END ASM
  PRINT ctr 
LOOP WHILE ctr > 0

DEC = decrement (default value of 1); in this case we are decrementing ctr by 1 each iteration of the Do While loop.
The print statement can be placed above the ASM block, but below the Do invocation as well for printing from 10 to 1 rather than 9 to 0 (illustrated in this code sample). DWord is double-word or 32 bits while QWord is quad word or 64 bits. The 64 bit dec operation is available in source commented out --just remember (in this particular case) one or the other (32 OR 64 bit specific variants). The DWord version will work with 64bit compiles because of x86_64 backwards compatibility, but the CPU has to switch out of 64bit mode into 32bit mode and back again adding cycles --so, go with your target platform's version appropriately.

[MrSwiss]

Very late response ....

And long, after the issue (and more) had been solved.
Its considered 'a bad habit' to 'bump' old threads (aka: rewarm the dead).